Physical Design Engineer
by Tata Consultancy Services
Job Description
Required Skill -
Experience in RTL to GDSII flow with involvement in multiple Tape-outs using Synopsys flow /Cadence Flow
Should have handled full chip floor plan and timing closure for multi-million gate designs
Should have worked on 65nm, 45nm , 28nm and lower technology nodes
Proficiency in Synthesis and STA
Experience in Physical Verification
Well versed in Perl and Tcl scripting.
Experience in technically leading a team of physical design engineers
Strong communication and analytical skills
Willing to relocate to abroad
Tool Expertise Required:
Hands on experience in Synopsys tools - ICC, DC, PT, ICV
Hercules , StarRC .
Hands on experience in Cadence tools Encounter
Experience in RTL to GDSII flow with involvement in multiple Tape-outs using Synopsys flow /Cadence Flow
Should have handled full chip floor plan and timing closure for multi-million gate designs
Should have worked on 65nm, 45nm , 28nm and lower technology nodes
Proficiency in Synthesis and STA
Experience in Physical Verification
Well versed in Perl and Tcl scripting.
Experience in technically leading a team of physical design engineers
Strong communication and analytical skills
Willing to relocate to abroad
Tool Expertise Required:
Hands on experience in Synopsys tools - ICC, DC, PT, ICV
Hercules , StarRC .
Hands on experience in Cadence tools Encounter
Salary:
Not Disclosed by Recruiter
Industry:
Farea:
Role Category:
Engineering Design
Role:
Design Engineerrvices Ltd. in Hyderabad / Secunderabad
Experience: 8 to 13 yrs
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